Commit 775d4b32 authored by vpalladi's avatar vpalladi
Browse files

adding some forgotten files

parent 136047c3
<node description="Alignment monitoring" fwinfo="endpoint;width=1" class="AlignMonNode">
<node id="ctrl" address="0x0">
<node id="ctr_rst" mask="0x1"/>
<node id="freeze" mask="0x2"/>
<node id="del_rst" mask="0x10"/>
<node id="del_inc" mask="0x20"/>
<node id="del_dec" mask="0x40"/>
</node>
<node id="stat" address="0x1">
<node id="cyc" mask="0x7"/>
<node id="bx" mask="0xfff0"/>
<node id="err_cnt" mask="0xff0000"/>
</node>
</node>
<node description="MP7 channel buffer" fwinfo="endpoint" class="ChanBufferNode">
<node id="csr" address="0x0" description="Control / status register" fwinfo="endpoint;width=2">
<node id="mode" address="0x0">
<node id="mode" mask="0x3"/>
<node id="datasrc" mask="0xc"/>
<node id="stbsrc" mask="0x30"/>
<node id="patt_valid_disable" mask="0x40"/>
<node id="cap_stb_mask" mask="0x80"/>
<node id="stb_patt" mask="0x3f00"/>
<node id="daq_bank" mask="0xf0000"/>
</node>
<node id="range" address="0x1">
<node id="trig_cyc" mask="0xf"/>
<node id="trig_bx" mask="0xfff0"/>
<node id="max_word" mask="0xfff0000"/>
</node>
<node id="stat" address="0x2">
<node id="locked" mask="0x1"/>
<node id="cap_done" mask="0x2"/>
</node>
</node>
<node id="buffer" address="0x4" description="Capture / playback buffers for MGT channel" fwinfo="endpoint;width=1">
<node id="addr" address="0x0"/>
<node id="data" address="0x1" size="0x800" mode="port"/>
</node>
</node>
<?xml version="1.0" encoding="LATIN1"?>
<node >
<node id="rx_trailer" address="0x0"/>
<node id="status" address="0x1">
<node id="txusrrst" mask="0x80000000" />
<node id="rxusrrst" mask="0x40000000" />
<node id="tx_fsm_reset_done" mask="0x20000000" />
<node id="rx_fsm_reset_done" mask="0x10000000" />
<node id="rxcdrlock" mask="0x08000000" />
<node id="cpll_lock" mask="0x04000000" />
<node id="crc_checked" mask="0x000000ff"/>
<node id="crc_error" mask="0x0000ff00"/>
</node>
</node>
<node>
<node id="control">
<node id="loopback" mask="0x00000007"/>
<node id="reset_crc_counters" mask="0x00000008"/>
<node id="txpolarity" mask="0x00000010"/>
<node id="rxpolarity" mask="0x00000020"/>
<node id="tx_fsm_reset" mask="0x00000040"/>
<node id="rx_fsm_reset" mask="0x00000080"/>
<node id="orbit_tag_enable" mask="0x00000100"/>
<node id="align_disable" mask="0x00000200"/>
</node>
</node>
<?xml version="1.0" encoding="LATIN1"?>
<node>
<node id="status">
<node id="qplllock" mask="0x00000001" />
<node id="kind" mask="0x0000001E" description="Defines the kind of quad - 10g, 5g, 3g, etc" />
</node>
</node>
<?xml version="1.0" encoding="LATIN1"?>
<node>
<node id="control">
<node id="soft_reset" mask="0x00000001" />
</node>
</node>
<node description="MP7 control registers" fwinfo="endpoint" class="CtrlNode">
<node id="id" address="0x0" description="ID register" fwinfo="endpoint;width=3">
<node id="magic" address="0x0"/>
<node id="fwrev" address="0x1">
<node id="c" mask="0x000000ff"/>
<node id="b" mask="0x0000ff00"/>
<node id="a" mask="0x00ff0000"/>
<node id="design" mask="0xff000000"/>
</node>
<node id="generics" address="0x2">
<node id="bunch_count" mask="0xfff"/>
<node id="ro_chunks" mask="0x3f000"/>
<node id="lb_addr_width" mask="0x3c0000"/>
<node id="n_region" mask="0xfc00000"/>
<node id="clock_ratio" mask="0xf0000000"/>
</node>
<node id="algorev" address="0x3"/>
<node id="build_time" address="0x4"/>
<node id="blame_hash" address="0x5"/>
</node>
<node id="csr" address="0x8" description="ctrl/stat register" fwinfo="endpoint;width=1">
<node id="ctrl" address="0x0">
<node id="nuke" mask="0x1"/>
<node id="uc_sel" mask="0x2"/>
<node id="clk40_rst" mask="0x4"/>
<node id="clk40_sel" mask="0x8"/>
<node id="soft_rst" mask="0x20"/>
</node>
<node id="stat" address="0x1">
<node id="clk40_lock" mask="0x1"/>
<node id="clk40_stop" mask="0x2"/>
<node id="debug" mask="0xff00"/>
</node>
</node>
<node id="board_id" address="0xa" description="Board ID register" fwinfo="endpoint;width=0">
<node id="board" mask="0xf"/>
<node id="crate" mask="0xf0"/>
<node id="component" mask="0xf00"/>
<node id="system" mask="0xf000"/>
</node>
</node>
<node description="MP7 IO datapath" fwinfo="endpoint" class="DatapathNode">
<node id="ctrl" address="0x0" description="ctrl/stat register" fwinfo="endpoint;width=0">
<node id="txrx_sel" mask="0x01"/>
<node id="chan_sel" mask="0x06"/>
<node id="quad_sel" mask="0xf8"/>
</node>
<node id="region_info" address="0x1" module="file://region_info.xml"/>
<node id="bc0_mon" module="file://align_mon.xml" address="0x2"/>
<node id="region" module="file://mp7_region.xml" address="0x800"/>
</node>
<node description="Dynamic Reconfiguration Port (DRP) registers within the GTH transceiver" fwinfo="endpoint;width=9">
<node id="es_qual_mask_15to00" address="0x31" mask="0xffff" />
<node id="es_qual_mask_31to16" address="0x32" mask="0xffff" />
<node id="es_qual_mask_47to32" address="0x33" mask="0xffff" />
<node id="es_qual_mask_63to48" address="0x34" mask="0xffff" />
<node id="es_qual_mask_79to64" address="0x35" mask="0xffff" />
<node id="es_sdata_mask_15to00" address="0x36" mask="0xffff" />
<node id="es_sdata_mask_31to16" address="0x37" mask="0xffff" />
<node id="es_sdata_mask_47to32" address="0x38" mask="0xffff" />
<node id="es_sdata_mask_63to48" address="0x39" mask="0xffff" />
<node id="es_sdata_mask_79to64" address="0x3a" mask="0xffff" />
<node id="es_prescale" address="0x3b" mask="0xf800" />
<node id="es_vert_offset" address="0x3b" mask="0x1ff" />
<node id="es_horz_offset" address="0x3c" mask="0xfff" />
<node id="es_control" address="0x3d" >
<node id="run" mask="0x1"/>
<node id="arm" mask="0x2"/>
<node id="trigger" mask="0x3c"/>
</node>
<node id="cpll_refclk_div" address="0x5e" mask="0x1f00" />
<node id="cpll_fbdiv_45" address="0x5e" mask="0x80" />
<node id="cpll_fbdiv" address="0x5e" mask="0x7f" />
<node id="cpll_cfg_15to00" address="0x7f" mask="0xffff" />
<node id="cpll_cfg_28to16" address="0x80" mask="0x1fff" />
<node id="txout_div" address="0x88" mask="0x38" />
<node id="rxout_div" address="0x88" mask="0x7" />
<node id="pma_rsv_0" address="0x99" mask="0xffff" />
<node id="pma_rsv_1" address="0x9a" mask="0xffff" />
<node id="rxcdr_cfg_0" address="0xa8" mask="0xffff" />
<node id="rxcdr_cfg_1" address="0xa9" mask="0xffff" />
<node id="rxcdr_cfg_2" address="0xaa" mask="0xffff" />
<node id="rxcdr_cfg_3" address="0xab" mask="0xffff" />
<node id="rxcdr_cfg_4" address="0xac" mask="0xffff" />
<node id="rxcdr_cfg_5" address="0xad" mask="0x0007" />
<node id="es_error_count" address="0x151" mask="0xffff" />
<node id="es_sample_count" address="0x152" mask="0xffff" />
<node id="es_control_status" address="0x153" >
<node id="done" mask="0x1" />
<node id="state" mask="0xe" />
</node>
<node id="rx_prbs_err_cnt" address="0x15e" mask="0xffff" />
</node>
<node description="Dynamic Reconfiguration Port (DRP) common registers within the GTH Quad" fwinfo="endpoint;width=9">
<node id="qpll_cfg_15to00" address="0x32" mask="0xffff" />
<node id="qpll_refclk_div" address="0x33" mask="0xf800" />
<node id="qpll_cfg_26to16" address="0x33" mask="0x7ff" />
<node id="qpll_lock_cfg" address="0x34" mask="0xffff" />
<node id="qpll_fbdiv" address="0x36" mask="0x3ff" />
<node id="qpll_fbdiv_ratio" address="0x37" mask="0x40" />
<node id="qpll_clkout_cfg" address="0x37" mask="0x3c" />
</node>
<node description="MP7 formatter block" class="FormatterNode">
<node id="csr" address="0x0" description="ctrl register" fwinfo="endpoint;width=1">
<node id="ctrl" address="0x0" description="general ctrl register">
<node id="enable_strip" mask="0x1"/>
<node id="enable_insert" mask="0x2"/>
<node id="sel_bxsrc" mask="0x4"/>
<node id="flag_bx" mask="0xfff0"/>
<node id="dest" mask="0xff0000"/>
<node id="src" mask="0xff000000"/>
</node>
<node id="dv_override" address="0x1" description="data valid override register">
<node id="enable_dv_override" mask="0x1" description="replaces datavalid signal from payload with locally generated signal"/>
<node id="sub_bx_start" mask="0xe"/>
<node id="bx_start" mask="0xfff0"/>
<node id="sub_bx_stop" mask="0x70000"/>
<node id="bx_stop" mask="0x7ff80000"/>
</node>
</node>
</node>
<node id="MmcPipe" class="MmcPipeInterface" size="0x3" fwinfo="endpoint;width=2">
<node id="FPGAtoMMCcounters" address="0x0"/>
<node id="MMCtoFPGAcounters" address="0x1"/>
<node id="FIFO" address="0x2" mode="non-incremental" size="512"/>
</node>
<node description="MGT quad CSR registers" fwinfo="endpoint;width=5" class="MGTRegionNode">
<node id="rw_regs" module="file://mp7_quad_rw.xml" address="0x00000"/>
<node id="ro_regs" module="file://mp7_quad_ro.xml" address="0x00010"/>
</node>
<?xml version="1.0" encoding="LATIN1"?>
<node>
<node id="ch0" module="file://mp7_chan_ro.xml" address="0x0000"/>
<node id="ch1" module="file://mp7_chan_ro.xml" address="0x0002"/>
<node id="ch2" module="file://mp7_chan_ro.xml" address="0x0004"/>
<node id="ch3" module="file://mp7_chan_ro.xml" address="0x0006"/>
<node id="common" module="file://mp7_common_ro.xml" address="0x0008"/>
</node>
\ No newline at end of file
<node>
<node id="ch0" module="file://mp7_chan_rw.xml" address="0x0000"/>
<node id="ch1" module="file://mp7_chan_rw.xml" address="0x0001"/>
<node id="ch2" module="file://mp7_chan_rw.xml" address="0x0002"/>
<node id="ch3" module="file://mp7_chan_rw.xml" address="0x0003"/>
<node id="common" module="file://mp7_common_rw.xml" address="0x0004"/>
</node>
\ No newline at end of file
<node description="MP7 readout" fwinfo="endpoint" class="ReadoutNode">
<node id="csr" address="0x0" description="DAQ/Readout CSR" fwinfo="endpoint;width=2">
<node id="ctrl" address="0x0">
<node id="src_sel" mask="0x1"/>
<node id="amc13_en" mask="0x2"/>
<node id="auto_empty" mask="0x4"/>
<node id="amc13_link_rst" mask="0x8"/>
<node id="bx_offset" mask="0xfff0"/>
<node id="fake_evt_size" mask="0xfff0000"/>
<node id="auto_empty_rate" mask="0xf0000000"/>
</node>
<node id="warn_ctrl" address="0x1">
<node id="buffer_hwm" mask="0x00ff"/>
<node id="buffer_lwm" mask="0xff00"/>
<node id="token_throttle_en" mask="0x10000"/>
</node>
<node id="stat" address="0x2">
<node id="src_err" mask="0x1"/>
<node id="rob_err" mask="0x2"/>
<node id="amc13_warn" mask="0x4"/>
<node id="amc13_rdy" mask="0x8"/>
<node id="debug" mask="0xffffff00"/>
</node>
<node id="evt_count" address="0x3" permission="r"/>
</node>
<node id="tts_csr" address="0x4" description="TTS CSR" fwinfo="endpoint;width=1">
<node id="ctrl" address="0x0">
<node id="tts" mask="0xf"/>
<node id="board_rdy" mask="0x10"/>
<node id="tts_force" mask="0x20"/>
</node>
<node id="stat" address="0x1">
<node id="tts_stat" mask="0xf"/>
</node>
</node>
<node id="buffer" address="0x8" size="0x4" description="DAQ/Readout buffer" fwinfo="endpoint;width=1">
<node id="fifo_flags" address="0x0" permission="r">
<node id="fifo_cnt" mask="0x3ffff"/>
<node id="fifo_valid" mask="0x1000000"/>
<node id="fifo_warn" mask="0x2000000"/>
<node id="fifo_full" mask="0x4000000"/>
<node id="fifo_empty" mask="0x8000000"/>
</node>
<node id="data" address="0x1" size="0x3000" mode="port" permission="r"/>
</node>
<node id="hist" module="file://state_history.xml" address="0x10"/>
<node id="tts_hist" module="file://state_history.xml" address="0x14"/>
<node id="tts_ctrs" address="0x20" description="TTS counters" permission="r" fwinfo="endpoint;width=4">
<node id="uptime_ctr_l" address="0x0"/>
<node id="uptime_ctr_h" address="0x1"/>
<node id="busy_ctr_l" address="0x2"/>
<node id="busy_ctr_h" address="0x3"/>
<node id="ready_ctr_l" address="0x4"/>
<node id="ready_ctr_h" address="0x5"/>
<node id="warn_ctr_l" address="0x6"/>
<node id="warn_ctr_h" address="0x7"/>
<node id="oos_ctr_l" address="0x8"/>
<node id="oos_ctr_h" address="0x9"/>
</node>
<node id="zs" address="0x34" description="Formatting for the readout buffer" fwinfo="endpoint;width=2">
<node id="ctrl" address="0x0">
<node id="en" mask="0x1"/>
<node id="sel" mask="0xff0"/>
<node id="val_mode" mask="0xff000"/>
</node>
<node id="mask_data" address="0x1"/>
<node id="stat" address="0x2" permission="r"/>
<node id="info" address="0x3" permission="r"/>
</node>
<node id="evt_check" address="0x32" description="Check the number of events passing through" fwinfo="endpoint;width=1">
<node id="evt_err" address="0x1"/>
</node>
<node id="readout_control" module="file://mp7_readout_control.xml" address="0x40"/>
</node>
<node description="MP7 readout control" fwinfo="endpoint" class="ReadoutCtrlNode">
<node id="csr" address="0x0" description="Readout Control" fwinfo="endpoint;width=2">
<node id="ctrl" address="0x0">
<node id="mode_sel" mask="0xf"/>
<node id="cap_sel" mask="0xf0"/>
<node id="bank_sel" mask="0xf00"/>
</node>
<node id="dr_ctrl" address="0x1">
<node id="dr_hwm" mask="0x1ff"/>
<node id="dr_lwm" mask="0x3fe00"/>
<node id="dr_err_en" mask="0x80000"/>
</node>
<node id="stat" address="0x2" permission="r">
<node id="fifo_full" mask="0x1"/>
<node id="fifo_empty" mask="0x2"/>
<node id="dr_warn" mask="0x4"/>
<node id="dr_full" mask="0x8"/>
<node id="n_modes" mask="0xf0"/>
<node id="n_caps" mask="0xf00"/>
<node id="n_banks" mask="0xf000"/>
</node>
</node>
<node id="bank_csr" address="0x4" description="Bank address counters" fwinfo="endpoint;width=1">
<node id="ctrl" address="0x0">
<node id="wp_bx" mask="0xf"/>
</node>
<node id="stat" address="0x1">
<node id="dr_occupancy" mask="0xfff"/>
<node id="dr_max_occ" mask="0xfff000"/>
</node>
</node>
<node id="mode_csr" address="0x10" description="Ctrl/Status of each readout control mode" fwinfo="endpoint;width=3">
<node id="ctrl" address="0x0">
<node id="evt_size" mask="0xfffff"/>
<node id="evt_trig" mask="0xff00000"/>
</node>
<node id="hdr" address="0x1">
<node id="event_type" mask="0xffff"/>
</node>
<node id="stat" address="0x2" permission="r">
<node id="fifo_full" mask="0x1"/>
<node id="fifo_empty" mask="0x2"/>
</node>
<node id="evt_done" address="0x3" permission="r"/>
</node>
<node id="cap_csr" address="0x8" description="Ctrl/Status of the capture controls" fwinfo="endpoint;width=1">
<node id="ctrl" address="0x0">
<node id="bank_id" mask="0x7"/>
<node id="cap_en" mask="0x8"/>
<node id="cap_delay" mask="0xf0"/>
<node id="cap_size" mask="0xf00"/>
<node id="cap_id" mask="0xf000" />
<node id="readout_length" mask="0xff0000"/>
</node>
<node id="stat" address="0x1">
<node id="fifo_full" mask="0x1"/>
<node id="fifo_empty" mask="0x2"/>
</node>
</node>
<node id="hist" module="file://state_history.xml" address="0x20"/>
</node>
<node description="MP7 clock region" fwinfo="endpoint">
<node id="buffer" module="file://mp7_chan_buffer.xml" address="0x0"/>
<node id="formatter" module="file://mp7_formatter.xml" address="0x8"/>
<node id="align" module="file://align_mon.xml" address="0x10"/>
<node id="mgt" module="file://mp7_links.xml" address="0x40"/>
<node id="drp" module="file://mp7_drp_chan.xml" address="0x200"/>
<node id="drp_com" module="file://mp7_drp_common.xml" address="0x400"/>
</node>
<node description="MP7 TTC block control registers" fwinfo="endpoint" class="TTCNode">
<node id="csr" address="0x0" description="MP7 TTC block" fwinfo="endpoint;width=3">
<node id="ctrl" address="0x0">
<node id="ttc_enable" mask="0x1"/>
<node id="err_ctr_clear" mask="0x2"/>
<node id="rst" mask="0x4"/>
<node id="int_bc0_enable" mask="0x8"/>
<node id="ctr_clear" mask="0x40"/>
<node id="l1a_force" mask="0x80"/>
<node id="throttle_en" mask="0x100"/>
<node id="b_cmd_force" mask="0x200"/>
<node id="ttc_sync_en" mask="0x400"/>
<node id="ttc_sync_bx" mask="0xfff000"/>
<node id="b_cmd" mask="0xff000000"/>
</node>
<node id="ctrl1" address="0x1">
<node id="ttc_phase" mask="0xfff"/>
<node id="ttc_phase_en" mask="0x1000"/>
<node id="c_del" mask="0x1f0000"/>
</node>
<node id="stat0" address="0x4">
<node id="bunch_ctr" mask="0xfff"/>
<node id="bc0_lock" mask="0x10000"/>
<node id="dist_lock" mask="0x20000"/>
<node id="ttc_phase_ok" mask="0x40000"/>
<node id="force_pending" mask="0x80000"/>
<node id="orb_len" mask="0xfff00000"/>
</node>
<node id="stat1" address="0x5">
<node id="evt_ctr" mask="0xffffffff"/>
</node>
<node id="stat2" address="0x6">
<node id="orb_ctr" mask="0xffffffff"/>
</node>
<node id="stat3" address="0x7">
<node id="single_biterr_ctr" mask="0xffff"/>
<node id="double_biterr_ctr" mask="0xffff0000"/>
</node>
</node>
<node id="freq" address="0x8" description="TTC frequency counter" fwinfo="endpoint;width=1">
<node id="ctrl" address="0x0">
<node id="chan_sel" mask="0xf"/>
<node id="en_crap_mode" mask="0x10"/>
</node>
<node id="freq" address="0x1">
<node id="count" mask="0xffffff"/>
<node id="valid" mask="0x1000000"/>
</node>
</node>
<node id="l1_gen" address="0xa" description="L1A random generator" fwinfo="endpoint;width=1">
<node id="ctrl" address="0x0">
<node id="rate" mask="0x3fffffff"/>
<node id="rules_en" mask="0x80000000"/>
</node>
<node id="trig_cnt" address="0x1"/>
</node>
<node id="hist" module="file://state_history.xml" address="0xc"/>
<node id="cmd_ctrs" address="0x10" description="TTC command counters" fwinfo="endpoint;width=1">
<node id="ctr_sel" address="0x0"/>
<node id="ctr" address="0x1"/>
</node>
<node id="tmt" address="0x12" description="TMT cycle control" fwinfo="endpoint;width=0">
<node id="max_phase" mask="0xf"/>
<node id="phase" mask="0xf0"/>
<node id="l1a_offset" mask="0xf00"/>
<node id="pkt_offset" mask="0xf000"/>
</node>
</node>
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