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Sella, Iftach
ARM Emulator
Commits
611bc5fa
Commit
611bc5fa
authored
2 years ago
by
Kayleigh Mengers
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multiply/data transfer
parent
0149f3ae
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!3
Multiply dataTransfer
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emulate.c
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611bc5fa
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@@ -335,6 +335,66 @@ void branchInstr(struct ProcessorState *processor, uint32_t address)
return
;
}
void
multiplyInstr
(
struct
ProcessorState
*
processor
,
uint32_t
instruction
)
{
// Check if the instruction should be executed according to its condition codes
if
(
!
validCond
(
getBits
(
instruction
,
28
,
31
),
processor
)){
return
;
}
//TODO: check if this is correct
if
(
isSet
(
instruction
,
21
)){
// Execute multiply and accumulate
uint32_t
result
=
((
getBits
(
instruction
,
0
,
3
))
*
(
getBits
(
instruction
,
8
,
11
)))
+
(
getBits
(
instruction
,
12
,
15
));
}
else
{
uint32_t
result
=
(
getBits
(
instruction
,
0
,
3
))
*
(
getBits
(
instruction
,
8
,
11
));
}
// Store the result
&
processor
->
registers
[
getBits
(
instruction
,
16
,
19
)]
=
result
;
// Set the CPRS flags
if
(
isSet
(
instruction
,
20
)){
uint32_t
*
cprs
=
processor
->
registers
[
16
];
// N
setBit
(
cprs
,
31
,
isSet
(
result
,
31
));
// Z
setBit
(
cprs
,
30
,
result
==
0
);
}
}
void
dataTransferInstr
(
struct
ProcessorState
*
processor
,
uint32_t
instruction
)
{
// Check if instruction should be executed according to its condition codes
if
(
!
validCond
(
getBits
(
instruction
,
28
,
31
),
processor
)){
return
;
}
// Get the offset
bool
carry
;
uint32_t
offset
=
barrelShift
(
!
isSet
(
instruction
,
25
),
getBits
(
instruction
,
0
,
11
),
&
carry
,
processor
);
//TODO: check if this is correct
if
(
isSet
(
instruction
,
20
)){
// Load from memory - memory address stored in base register is to be accessed and loaded into the destination register
&
processor
->
registers
[
getBits
(
instruction
,
12
,
15
)]
=
processor
->
memory
[
getBits
(
instruction
,
16
,
19
)];
}
else
{
// Store into memory - source register is to be stored at the memory address stored in the base register
processor
->
memory
[
getBits
(
instruction
,
16
,
19
)]
=
processor
->
registers
[
getBits
(
instruction
,
12
,
15
)];
}
// Post Indexing, must happen after transfer
if
(
!
isSet
(
instruction
,
24
)){
if
(
isSet
(
instruction
,
23
)){
uint32_t
baseReg
=
(
getBits
(
instruction
,
16
,
19
))
+
offset
;
}
else
{
uint32_t
baseReg
=
(
getBits
(
instruction
,
16
,
19
))
-
offset
;
}
// Store new base register
&
processor
->
registers
[
getBits
(
instruction
,
16
,
19
)]
=
baseReg
;
}
}
// Steps through pipeline calling appropriate instruction method.
// Sets teminate if instruction is all-0.
void
step
(
struct
ProcessorState
*
processor
,
bool
*
terminate
)
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